1. Field of the Invention
The present invention relates to a circuit arrangement for identifying and storing power line faults, and in particular for a circuit arrangement for displaying the identity of faults.
2. Description of the Prior Art
The high expense of downtime which arrives for an outage of modern data processing systems require that the causes of such outages be detected as quickly and reliably as possible. Particularly difficult is the identification of sporadic faults as represented, for example, by inadmissibly long power line collapses, which can lead to a shut-off of the power supply and, therefore, to the outage, for example, a computer.